The present invention relates to data communication switching, and more particularly to receive processing in data communication switching architectures of the type which switch packets over dedicated transmission lines between a plurality of switching controllers.
Local area network (LAN) switches generally perform a switching function on an internal backplane operative between switching controllers supporting external network devices. Such switching has typically been accomplished by configuring the backplane as a shared packet bus and granting the switching controllers having packets for transmission control of the backplane in time-multiplexed fashion. A conventional LAN switch backplane is illustrated in FIG. 1. LAN switch 10 includes switching controllers 110, 120, 130, 140 performing a switching function by transmitting and receiving packets over shared packet bus 150. Time-multiplexing is known to have been accomplished in such conventional LAN switches several ways. One way is assigning the controllers different clock cycles within a repetitive timing cycle and granting control of the bus to the controllers round-robin in accordance with their assigned clock cycles. Another way involves conducting a priority-based arbitration among the controllers having packets for transmission and granting control of the bus to the controller which “wins” the arbitration. Regardless of which bus control strategy is favored, reliance on a shared packet bus, and its inherent requirement of time-multiplexing packets for release to guarantee contention-free transmission, has led to congestion at the transmit side of the bus and inefficient use of receive processing resources. For example, unicast packets transmitted across the backplane are destined for a network device supported by only one of the controllers. However, where the backplane is a shared packet bus, all controllers must wait for a unicast packet to clear the backplane before a subsequent packet can be transmitted. This often results in clock cycles in which the receive processing resources of many controllers are idle, even while congestion may be developing at the transmit side of the backplane.
A more efficient approach would obviate the need to time-multiplex data for release across the backplane and, under normal operating conditions, would allow all packets awaiting transmission across the backplane to be forwarded without delay. However, to reap the full benefit of such “on the fly” transmission requires receive processing resources capable of efficiently handling parallel traffic. Otherwise, the conventional problem of underutilization of receive processing resources and transmit side congestion may inadvertently become one of overutilization of receive processing resources and receive side congestion.